A wide variety of electronic circuits, especially those involving very small input signals, require signal paths with very low offset voltage. The offset voltage varies with temperature, supply voltage, and other process corners.
Many standard electronic applications use system level auto-calibration technique to achieve this low offset. However, the auto-calibration technique requires more complicated and costly hardware and software, and can slow down time-to-market for new products. The electronic applications, alternatively, employ components with low offset and drift performance. The electronic components such as amplifiers, with by far the lowest offset and drift available, share common design architecture: the chopper or auto-zero amplifier type.
Typically, devices used in a comparator have minimum device lengths for faster operation, but this translates into larger mismatches between the differential input pairs and the current mirrors. Moreover, the offset between the current mirrors and the differential input pairs varies with supply voltage, temperature and process corners. Therefore, trimming such offsets is a difficult task. For a comparator that is part of an SAR ADC, any offset translates into a Differential Non-linearity error, and subsequently into an integrated non-linearity error.
Thus, there remains a need for a robust high gain auto-zeroing arrangement to eliminate the mismatches associated with comparators and other electronic circuits.